|
RAR-files |
| ilearn-fvccqnfm.rar |
350,000,000 |
3C20E515 |
| ilearn-fvccqnfm.r00 |
350,000,000 |
4176B5A2 |
| ilearn-fvccqnfm.r01 |
350,000,000 |
14C5EA77 |
| ilearn-fvccqnfm.r02 |
350,000,000 |
9264356D |
| ilearn-fvccqnfm.r03 |
350,000,000 |
868FA840 |
| ilearn-fvccqnfm.r04 |
350,000,000 |
606AE82B |
| ilearn-fvccqnfm.r05 |
350,000,000 |
50427447 |
| ilearn-fvccqnfm.r06 |
350,000,000 |
423D3A11 |
| ilearn-fvccqnfm.r07 |
350,000,000 |
D6FC83E4 |
| ilearn-fvccqnfm.r08 |
350,000,000 |
90409ED8 |
| ilearn-fvccqnfm.r09 |
350,000,000 |
191EDF6D |
| ilearn-fvccqnfm.r10 |
350,000,000 |
228D6958 |
| ilearn-fvccqnfm.r11 |
350,000,000 |
46F2E5D6 |
| ilearn-fvccqnfm.r12 |
350,000,000 |
A35197F8 |
| ilearn-fvccqnfm.r13 |
350,000,000 |
474E57B6 |
| ilearn-fvccqnfm.r14 |
350,000,000 |
B26A7626 |
| ilearn-fvccqnfm.r15 |
350,000,000 |
AA604F4C |
| ilearn-fvccqnfm.r16 |
350,000,000 |
D1C03C52 |
| ilearn-fvccqnfm.r17 |
350,000,000 |
E1B9BACD |
| ilearn-fvccqnfm.r18 |
350,000,000 |
DEB3EE21 |
| ilearn-fvccqnfm.r19 |
350,000,000 |
9F3F89D7 |
| ilearn-fvccqnfm.r20 |
350,000,000 |
5F2A011B |
| ilearn-fvccqnfm.r21 |
350,000,000 |
E5271CEF |
| ilearn-fvccqnfm.r22 |
350,000,000 |
C428DD48 |
| ilearn-fvccqnfm.r23 |
350,000,000 |
52671C88 |
| ilearn-fvccqnfm.r24 |
350,000,000 |
1BE04FF2 |
| ilearn-fvccqnfm.r25 |
350,000,000 |
2EC0A2C7 |
| ilearn-fvccqnfm.r26 |
63,513,881 |
CD8503E1 |
|
| Total size: |
9,513,513,881 |
|
|
| Archived
files |
|
12. Writing the Write enable to the global clock.mp4
[18ffd3db5b460651]
|
120,462,282 |
685D7AC4 |
|
13. Write the Send Quad command Process.mp4
[2722a52568ceb493]
|
239,389,122 |
64EC85AD |
|
14. Write the Send Quad Address Process.mp4
[2b37402b46791984]
|
135,977,892 |
6A91A3FF |
|
15. Write the Send Quad Data Process.mp4
[bb6962fbafe5101b]
|
110,456,844 |
76DF39C6 |
|
16. Write the Send NonVolatile Data Process.mp4
[d3f52b49b72f353f]
|
124,254,117 |
A741220F |
|
17. Write the Main State Machine.mp4
[83ba0c6d0a926182]
|
334,021,382 |
70B294D8 |
|
18. Write the Initialization State Machine.mp4
[8d2e21db261fe378]
|
485,188,834 |
E24322CD |
|
19. Write the Read status register state machine.mp4
[f2fab1616bfa0660]
|
344,890,366 |
8FD7AAFF |
|
20. Write the Fast Read state machine.mp4
[f1ad289af0681a5]
|
358,038,335 |
3BE58454 |
|
21. Write the Data to the QSPI state machine.mp4
[bd1c07fb203dc5ca]
|
280,198,531 |
88C9AA8B |
|
22. Write 16 bits command state machine.mp4
[f2e2ea2c624cd267]
|
95,274,919 |
0D8997D2 |
|
23. Write 8 bits command state machine.mp4
[2256b2b14d4b2a43]
|
144,130,040 |
48780AED |
|
24. Write the Sector Erase state machine.mp4
[caf2861022fe32fd]
|
103,951,485 |
336CFD9A |
|
25. Connecting the QSPI controller and the register file to the top entity.mp4
[f233fd4b964c4161]
|
237,727,958 |
E4BCDDF9 |
|
26. Adding the QSPI flash memory Verilog component to the test bench.mp4
[9d65f7f8df2c7b98]
|
272,709,714 |
67378F74 |
|
27. Open the project files in Modelsim and fixing syntax errors.mp4
[4d820945268c665e]
|
195,945,623 |
E56B4F9D |
|
28. Simulate the project and fix the clocks and initialization.mp4
[256b2888b33e169a]
|
830,725,493 |
24564169 |
|
29. Writing the Testbench and test the Read status register.mp4
[5e3191fcd8bfd94d]
|
708,828,904 |
7E9235E9 |
|
30. Writing the Testbench and test the Write data to the QSPI.mp4
[c05292f0d56f67f7]
|
773,144,691 |
69B4FBD4 |
|
31. Writing the Testbench and test the Fast read.mp4
[66479d3771fec22d]
|
539,558,414 |
D1E6D296 |
|
32. Writing the Testbench and test the Write 16 bits.mp4
[7e9163d1f4fab841]
|
573,268,008 |
F0684496 |
|
33. Writing the Testbench and test the Write 8 bits.mp4
[71887165a3b2463]
|
355,644,675 |
3D854AB8 |
|
34. Writing the Testbench and test the Sector erase.mp4
[a0374eacf428c9bc]
|
233,713,141 |
005019E6 |
|
35. Final files for this Course and Conclusions!.mp4
[3e542f9eb2151442]
|
44,007,001 |
2901FD17 |
|
36. Bonus lecture.mp4
[9111abae12c436a3]
|
27,486,787 |
A5A376E3 |
|
1. Introduction.mp4
[40aad738d1e88be2]
|
42,367,558 |
B923C812 |
|
2. Nor flash memory Vs Nand flash memory.mp4
[bd4ced4665075434]
|
25,850,826 |
9D7272BE |
|
3. SPI Protocol and our Flash.mp4
[541d260fb918e419]
|
59,049,150 |
8689F81B |
|
4. Download the QSPI component Verilog model.mp4
[da1f73a967b4c11]
|
44,636,936 |
096F2F30 |
|
5. Our QSPI Nor flash memory PDF datasheet explained.mp4
[29a9183976b898de]
|
297,634,066 |
82EF6A8F |
|
6. QSPI nor flash communication timing.mp4
[dfcaadd9e7807837]
|
204,950,822 |
7F2AF429 |
|
7. VHDL Code Plan - Must watch to understand the rest!.mp4
[a9f97474f3b1853d]
|
308,437,689 |
62BFF5B5 |
|
8. Writing the top entity and the Testbench Part1.mp4
[7caaf02582462922]
|
220,634,522 |
3032A9FA |
|
9. Write the Registers File Component.mp4
[9791f408545942bd]
|
299,579,712 |
8160BFF7 |
|
10. Writing the controller for the QSPI PART1.mp4
[d42d1ff0ecf1f456]
|
233,683,683 |
1777EDF2 |
|
11. Write the Read Data Process.mp4
[3163d51223cfea9]
|
107,687,734 |
54F164F2 |
|
| Total size: |
9,513,507,256 |
|
|
